22-Elec-B5 Advanced Electronics · May 2014

Question 4 of 5: BJT Cascode Amplifier — Voltage Gain

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

Paper format: National Exams, May 2014 — 07-Elec-B5 Advanced Electronics. Three hours, CLOSED BOOK, any non-communicating calculator permitted. Answer all FIVE (5) questions; all questions are worth 20 marks each. Op-amps are ideal and supply voltages are ±15 V unless stated otherwise; in schematics ground and chassis are common. Candidates are urged to state any assumption made in interpreting a question.

Reference texts (22-Elec-B5 Advanced Electronics):

A. S. Sedra & K. C. Smith, Microelectronic Circuits, 8th ed. — Ch. 7 (Transistor Amplifiers), Ch. 8 (Differential and Multistage Amplifiers), Ch. 10 (Frequency Response & Tuned Amplifiers), Ch. 11 (Feedback), Ch. 12 (Output Stages and Power Amplifiers).
B. Razavi, Design of Analog CMOS Integrated Circuits, 2nd ed. — Ch. 3 (Single-Stage Amplifiers), Ch. 4 (Differential Amplifiers), Ch. 9 (Cascodes and Frequency Response).
P. R. Gray, P. J. Hurst, S. H. Lewis & R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed. — Ch. 3–4 (single-transistor and differential stages), Ch. 8 (Feedback).

Check — two engineering assumptions used throughout this paper.

Bias currents are taken from the printed current sources, not from the drawn resistors. Questions 1, 3 and 4 all show an ideal current source setting the branch current, so each transistor's quiescent current is read directly off that source. Where a drawn resistor would imply a different current (Question 4's 1 kΩ emitter resistor), the paper's stated 1 mA governs and the resistor is treated as part of an undrawn bias network — see the Question 4 note.
Channel-length modulation is used in the small-signal model but not in the bias calculation. The tail (or bias) source fixes $I_D$ exactly, so $V_{OV}=\sqrt{2I_D/K}$ and $g_m=KV_{OV}=\sqrt{2KI_D}$ are computed with $\lambda$ set aside, while $r_o=1/(\lambda I_D)$ is carried into every gain expression. This is the standard convention and the error it introduces is well under one percent.

Question 4: BJT Cascode Amplifier — Voltage Gain (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given.

Quantity	Symbol	Value
Bias current (collector current of both devices)	$I_1$	1 mA
Cascode base bias	$V_{bias}$	4 V
Current gain	$\beta$	100
Early voltage	$V_A$	5 V
Supplies	$+V_{CC}$, $-V_{EE}$	+10 V, −10 V
Emitter and load resistors	$R_E$, $R_L$	1 kΩ each
Coupling and bypass capacitors	$C_{IN}$, $C_E$, $C_O$	$\infty$
Thermal voltage (standard)	$V_T$	25 mV

$Q_1$ is the common-emitter input device, its emitter fully bypassed to ground by $C_E$; $Q_2$ sits above it as the common-base cascode with its base held at $V_{bias}$ (an a.c. ground); the current source $I_1$ is the collector load, and the signal reaches $R_L$ through $C_O$.

Find. The mid-band voltage gain $v_{OUT}/v_{IN}$.

Check — the printed d.c. data are over-determined; the current source governs. The question states $I_1 = 1$ mA, and an ideal current source in the collector branch fixes the current through both transistors at that value. The drawn $R_E = 1\ \text{k}\Omega$ to $-10$ V would set a different emitter current if the base of $Q_1$ sat at 0 V, so the base must be biased at about $-8.29$ V by a network the figure does not show (its d.c. path is blocked by $C_{IN}$ in any case). This solution takes $I_{C1} = I_{C2} = 1$ mA as directed, and notes that $R_E$ is completely bypassed by $C_E = \infty$ and therefore plays no part in the a.c. answer whatever value it takes. Likewise, the figure labels the top rail $+V_{CC}$ while the given list writes $+V_{DD}$; both denote the same $+10$ V supply, and neither enters the gain.

Figure 4.1 — Question 4 circuit: common-emitter $Q_1$ (emitter bypassed by $C_E$) cascoded by common-base $Q_2$, loaded by the current source $I_1$ and a.c.-coupled to $R_L$.

Approach. Get the hybrid-$\pi$ parameters from the 1 mA bias, compute the cascode's output resistance, correct the transconductance for the current $r_{o1}$ steals from the cascode's emitter, and multiply by the total load the output node actually sees.

Establish the operating point and the small-signal parameters. The current source sets $I_{C1} = I_{C2} = 1$ mA, so for both devices $$g_m = \frac{I_C}{V_T} = \frac{1\ \text{mA}}{25\ \text{mV}} = 40\ \text{mA/V},$$ and from that transconductance the base and collector resistances follow: $$r_\pi = \frac{\beta}{g_m} = \frac{100}{40\ \text{mA/V}} = 2.5\ \text{k}\Omega, \qquad r_o = \frac{V_A}{I_C} = \frac{5\ \text{V}}{1\ \text{mA}} = 5\ \text{k}\Omega.$$ The 5 V Early voltage is unusually low, which is precisely why this question is interesting: $r_o$ is only five times $R_L$ and cannot be treated as infinite.
Confirm both devices are in the active region. $Q_2$'s emitter sits one diode drop below its base, $V_{E2} = V_{bias} - V_{BE} = 4.0 - 0.7 = 3.3$ V, and that node is also $Q_1$'s collector. With $Q_1$'s emitter at about $-8.99$ V (1.01 mA through the 1 kΩ $R_E$ from $-10$ V), $V_{CE1} = 3.3 - (-8.99) = 12.3$ V — comfortably active — and $Q_2$ likewise, since its collector floats up to whatever the current source needs below $+10$ V.
Reduce the a.c. circuit. $C_E$ shorts $R_E$ to ground, so $Q_1$ is a grounded-emitter stage driven directly by $v_{IN}$ through $C_{IN}$: $v_{be1} = v_{IN}$ exactly, with no input divider. $V_{bias}$ is an a.c. ground, so $Q_2$ is a common-base current buffer. The ideal current source $I_1$ contributes no shunt conductance, so the only external load at the output node is $R_L = 1$ kΩ via $C_O$.
Compute the resistance the cascode presents at its collector. Looking into $Q_2$'s collector, the resistance in its emitter is $r_{o1}$ in parallel with $r_{\pi2}$: $$R_x = r_{o1}\|r_{\pi2} = 5\ \text{k}\Omega \,\|\, 2.5\ \text{k}\Omega = 1.667\ \text{k}\Omega,$$ $$R_{out,\text{casc}} = r_{o2}\left(1+g_{m2}R_x\right)+R_x = 5\ \text{k}\Omega\left(1+66.67\right)+1.667\ \text{k}\Omega = 340\ \text{k}\Omega.$$ The cascode has multiplied $r_o$ by roughly 68 — but note what happens next.
Correct the transconductance for the current lost in $r_{o1}$. Not all of $Q_1$'s signal current reaches $Q_2$'s emitter; the fraction that does is set by the divider between $R_x$ and the $1/g_{m2}$ that $Q_2$ presents: $$G_m = g_{m1}\,\frac{g_{m2}R_x}{1+g_{m2}R_x} = 40\ \text{mA/V}\times\frac{66.67}{67.67} = 39.41\ \text{mA/V}.$$ The loss is 1.5 percent — small, but it is the only reason a careful answer differs from the textbook shortcut.
Assemble the gain. The output node is loaded by the cascode's own 340 kΩ in parallel with the 1 kΩ external load: $$R_{tot} = 340\ \text{k}\Omega\,\|\,1\ \text{k}\Omega = 997\ \Omega,$$ $$\boxed{A_v = \frac{v_{OUT}}{v_{IN}} = -G_mR_{tot} = -(39.41\ \text{mA/V})(997\ \Omega) = -39.3\ \text{V/V}}$$ An independent two-node solve of the full hybrid-$\pi$ network returns $-39.30$ V/V, confirming the result. Using the common shortcut $A_v \approx -g_{m1}(R_{out}\|R_L)$ gives $-39.9$ V/V, about 1.5 percent optimistic.
Interpret the result. The 1 kΩ external load is 340 times smaller than the cascode's output resistance, so it swamps it completely and the gain is essentially $-g_mR_L$ scaled by the small current-division factor. In other words the cascode buys almost nothing in gain here; what it buys is that the gain is set by $R_L$ rather than by the transistor's own $r_o$. A plain common-emitter stage with the same 1 kΩ load would see $r_o = 5$ kΩ in parallel with it and manage only $-g_m(r_o\|R_L) = -33.3$ V/V — an 18 percent penalty, and one that drifts with $V_A$. The cascode also suppresses the Miller effect on $C_\mu$ of $Q_1$, which is its usual reason for existing; the paper does not ask for the bandwidth, but that is the design motive behind the topology.

Quantity	Symbol	Result
Transconductance, input and output resistance per device	$g_m$, $r_\pi$, $r_o$	40 mA/V, 2.5 kΩ, 5 kΩ
Resistance in $Q_2$'s emitter	$r_{o1}\\|r_{\pi2}$	1.667 kΩ
Cascode output resistance	$R_{out,\text{casc}}$	340 kΩ
Effective transconductance	$G_m$	39.41 mA/V
Total load at the output node	$R_{out}\\|R_L$	997 Ω
Voltage gain	$v_{OUT}/v_{IN}$	−39.3 V/V (31.9 dB, inverting)
Comparison: plain common-emitter, same load	$-g_m(r_o\\|R_L)$	−33.3 V/V

Topic: Bipolar cascode — output resistance multiplication, effective transconductance, and what a low-impedance load does to both.

Key relations: $g_m = I_C/V_T$; $r_\pi = \beta/g_m$; $r_o = V_A/I_C$; resistance looking into a common-base collector with $R_E'$ in its emitter, $R_{out}=r_o(1+g_mR_E')+R_E'$; for the cascode $R_E' = r_{o1}\|r_{\pi2}$; effective $G_m = g_{m1}\,g_{m2}R_E'/(1+g_{m2}R_E')$; $A_v = -G_m\left(R_{out}\|R_L\right)$.

Why this works: A cascode does not amplify twice. $Q_1$ converts $v_{IN}$ into a current; $Q_2$ passes that current on at unity while presenting a very low resistance ($\approx 1/g_{m2}$) to $Q_1$'s collector and a very high resistance to the output node. Both of those properties come from the same fact — a common-base stage has near-unity current gain — and they are what let the designer set the gain with the load instead of with the device. The finite $r_{\pi2}$ of a bipolar cascode is the one asymmetry with the MOS case: some of $Q_1$'s current is diverted into $Q_2$'s base, which both caps $R_{out}$ at roughly $\beta r_o$ (here $\beta r_o = 500$ kΩ, and 340 kΩ is indeed just below it) and shaves the effective $G_m$. Whether any of that matters depends entirely on the load: with $R_L \ll R_{out}$, as here, the amplifier is load-dominated and the cascode is doing a frequency-response job, not a gain job.

Common pitfall: Two mistakes are common and both are large. The first is leaving $R_E$ in the a.c. analysis and computing a degenerated gain — $C_E$ is infinite, so $R_E$ is a d.c. element only. The second is quoting the open-circuit cascode gain $-g_mR_{out} = -13\,600$ V/V and forgetting that $C_O$ delivers the signal into a 1 kΩ load; the load is not optional and it dominates the answer. A third, minor slip is treating $r_o$ as infinite because the circuit "has a cascode": with $V_A = 5$ V it is only 5 kΩ and it is what makes $R_x$, and hence the 1.5 percent $G_m$ correction, worth writing down.

Source: Sedra & Smith, Microelectronic Circuits, 8th ed., Ch. 8 §8.5 (the cascode amplifier — MOS and BJT, output resistance and gain); Gray, Hurst, Lewis & Meyer, 5th ed., Ch. 3 §3.4 (cascode current sources and gain stages).

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