Question 1 of 5: 0.18 µm CMOS Differential Pair — Device Sizing and Differential Gain

Question 1: 0.18 µm CMOS Differential Pair — Device Sizing and Differential Gain (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given.

Find. (a) the aspect ratios $(W/L)_{1..4}$ that put all four transistors at $|V_{ov}| = 0.2$ V while carrying their share of the tail current, and (b) the small-signal differential voltage gain $A_d = v_{do}/v_{id}$ of the resulting design.

Approach. Split the tail current equally between the two branches, invert the square-law saturation equation once for the NMOS pair and once for the PMOS loads to get the two aspect ratios, then evaluate the differential half-circuit, whose gain is $g_m$ working into the parallel combination of the two output resistances at each drain.

1. Part (a) — fix the current every device must carry. The pair is balanced when $v_{id} = 0$, so the tail splits evenly and the two PMOS loads must carry exactly the same current as the devices below them: $$I_{D1}=I_{D2}=I_{D3}=I_{D4}=\frac{I_{bias}}{2}=\frac{200\ \mu\text{A}}{2}=100\ \mu\text{A}$$ Every subsequent sizing calculation is this one current pushed through the square law at the specified overdrive.
2. Size the NMOS input pair from the saturation equation. With $\lambda v_{DS}\ll 1$ neglected for sizing (it perturbs the current by at most a few per cent and is restored in part (b)), $I_D=\tfrac12\,\mu_n C_{ox}\,(W/L)\,V_{ov}^2$, so $$\left(\frac{W}{L}\right)_{1,2}=\frac{2I_D}{\mu_n C_{ox}V_{ov}^2} =\frac{2(100\times10^{-6})}{(400\times10^{-6})(0.2)^2} =\frac{200\times10^{-6}}{16\times10^{-6}}$$ which evaluates to $\boxed{(W/L)_{1}=(W/L)_{2}=12.5}$. At the stated $L=0.36$ µm that is a drawn width $W_1=W_2=12.5\times0.36=4.5$ µm.
3. Size the PMOS loads with the mobility-corrected parameter. The paper writes $\mu_n C_{ox}=4\mu_p C_{ox}=400$ µA/V$^2$, so the PMOS parameter is $\mu_p C_{ox}=100$ µA/V$^2$ — holes are four times less mobile than electrons. Repeating the same inversion at the same current and the same overdrive magnitude, $$\left(\frac{W}{L}\right)_{3,4}=\frac{2I_D}{\mu_p C_{ox}V_{ov}^2} =\frac{200\times10^{-6}}{(100\times10^{-6})(0.04)}=\boxed{50}$$ giving $W_3=W_4=50\times0.36=18$ µm. The PMOS devices come out exactly four times wider than the NMOS devices, which is the mobility ratio and the quickest sanity check on this part of the answer.
4. Confirm the operating point is self-consistent. Substituting the two aspect ratios back through the square law returns 100 µA in each branch, and each device is saturated because $v_{DS}\ge V_{ov}$ is satisfiable inside the 3 V rail-to-rail window: the NMOS pair needs $V_{GS}=V_{TH}+V_{ov}=0.7$ V and the PMOS loads need a gate bias $V_{G1}=V_{DD}-|V_{TH}|-|V_{ov}|=1.5-0.5-0.2=0.8$ V. Sizing that cannot be biased is not a design, so this line is worth writing out.
5. Part (b) — get the transconductance at the design point. For a saturated MOSFET $g_m=2I_D/V_{ov}$, which is the form to use here because the overdrive is the specified quantity: $$g_m=\frac{2I_D}{V_{ov}}=\frac{2(100\times10^{-6})}{0.2}=1.0\ \text{mA/V}$$ All four devices share the same current and overdrive, so all four have the same $g_m$.
6. Get the output resistance from the paper’s own formula. The formula sheet supplies $V_A=1/\lambda$ and $r_o=1/(\lambda I_D)$ directly, so $$\begin{aligned}V_A&=\frac{1}{0.2}=5\ \text{V}\\ r_o&=\frac{1}{\lambda I_D}=\frac{1}{(0.2)(100\times10^{-6})}=50\ \text{k}\Omega \end{aligned}$$ Because $\lambda$ and $I_D$ are common to the NMOS pair and the PMOS loads, $r_{o1}=r_{o2}=r_{o3}=r_{o4}=50$ kΩ, and the intrinsic gain of a single device is $g_m r_o=50$.
7. Evaluate the differential half-circuit. In the differential half-circuit the common source node is a virtual ground, so each side is a common-source stage whose drain sees its own $r_o$ in parallel with the load device’s $r_o$. The output is taken between the two drains, so the full differential swing is captured and $$A_d=\frac{v_{do}}{v_{id}}=g_m\,(r_{o2}\parallel r_{o4}) =(1.0\times10^{-3})\left(\frac{50\times50}{50+50}\times10^{3}\right) =(1.0\times10^{-3})(25\times10^{3})$$ so that $\boxed{A_d = 25\ \text{V/V}\ \ (27.96\ \text{dB})}$.
8. Cross-check the gain against the technology figure of merit. Substituting $g_m=2I_D/V_{ov}$ and $r_o=V_A/I_D$ into $A_d=\tfrac12 g_m r_o$ collapses the bias current entirely: $A_d=V_A/V_{ov}=5/0.2=25$. The differential gain of a pair whose loads share its $\lambda$ and its current is therefore always exactly half the intrinsic gain, and depends only on the Early voltage and the overdrive — not on how much current is spent. Getting 25 from two independent routes is the check worth showing.