Question 4 of 5: Tuned Amplifier with a Gate Tank — Centre Frequency, Gain and Bandwidth
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
Paper format. National Exams May 2018, 16-Elec-B5 Advanced
Electronics — 3 hours, CLOSED BOOK, one approved Casio or Sharp calculator. Five
questions, all to be answered, 20 marks each (100 marks total). In schematics ground
and chassis are common; op-amps are ideal and supply rails are ±15 V unless stated
otherwise. Candidates are told to state any interpretive assumption inside the answer, and to
supply block diagrams and schematics wherever an essay-format response needs them.
Reference texts. A. S. Sedra and K. C. Smith,
Microelectronic Circuits, 8th ed. (Ch. 7 transistor amplifiers, Ch. 8 differential and
multistage amplifiers, Ch. 10 frequency response, Ch. 11 feedback); B. Razavi,
Fundamentals of Microelectronics, 2nd ed. (Ch. 9 cascode stages — Question 5 is
its Example 9.9) and Design of Analog CMOS Integrated Circuits, 2nd ed. (Ch. 4
differential amplifiers, Ch. 6 frequency response); R. C. Jaeger and T. N. Blalock,
Microelectronic Circuit Design, 5th ed. (Ch. 17 low-frequency response); P. R. Gray,
P. J. Hurst, S. H. Lewis and R. G. Meyer, Analysis and Design of Analog Integrated
Circuits, 5th ed. (Ch. 8 feedback).
How each answer is laid out. Every question states its data,
the quantity sought, the circuit as drawn on the paper, a one-line strategy, then numbered
steps carrying the governing relation, the substitution and the intermediate result. Boxed
values are the answers a marker looks for, and each question closes with a results table and a
concept note.
Question 4: Tuned Amplifier with a Gate Tank — Centre Frequency, Gain
and Bandwidth (20 marks)
Find. (a) the resonant centre frequency $\omega_o$, (b) the
voltage gain $v_{OUT}/v_S$ measured from the source, at resonance, and (c) the −3 dB
bandwidth of the tuned response.
Question 4 — tuned amplifier. The L1∥C1 tank sits at the GATE, not at the drain; the drain carries only RL. C2 is an infinite bypass across the tail source, so M1 is a plain common-source stage.
Approach. Read where the tank actually sits (it is at the
gate, not the drain), gather every capacitance that appears in parallel with it —
including the Miller-multiplied $C_{gd}$ — then apply the standard parallel-RLC results
with $R_S$ as the damping resistance and $R_L$ setting only the forward gain.
Locate the tank, because everything downstream depends on it. a parallel tank at the gate — while the drain
carries only $R_L$ up to $+V_{DD}$. The consequence is that the damping resistance is
$R_S$, not $R_L$; the device capacitances add to $C_1$ instead of being negligible beside
it; and the resonant gain is a finite $-g_mR_L$ rather than the infinite value an undamped
drain tank would give with $\lambda = 0$.
Establish the bias point and $g_m$. With $C_2=\infty$ the tail current
source is perfectly bypassed, so the source of $M_1$ is an a.c. ground and the stage is a
plain common-source amplifier carrying $I_D=I_{bias}=2$ mA. For a square-law device biased
by a current source,
$$g_m=\sqrt{2KI_D}=\sqrt{2(1\times10^{-3})(2\times10^{-3})}=2.0\ \text{mA/V}$$
with overdrive $V_{ov}=\sqrt{2I_D/K}=2$ V, hence $V_{GS}=3$ V, and a quiescent drain
voltage $V_{DD}-I_{bias}R_L=10-4=6$ V — comfortably saturated.
Collect every capacitance that loads the tank. $C_{gs}$ sits directly
from gate to a.c. ground and adds outright. $C_{gd}$ bridges gate to drain across a gain of
$-g_mR_L$, so it appears at the gate multiplied by the Miller factor:
$$C_M=C_{gd}(1+g_mR_L)=1\times(1+(2\times10^{-3})(2\times10^{3}))=1\times5=5\ \text{pF}$$
$$C_{tot}=C_1+C_{gs}+C_M=200+10+5=215\ \text{pF}$$
This is precisely why the paper bothers to give $C_{gs}$ and $C_{gd}$ at all —
ignoring them is a 7 per cent error in the answers below.
Part (a) — resonate the tank. A lossless parallel $LC$ resonates
where the two susceptances cancel:
$$\omega_o=\frac{1}{\sqrt{L_1C_{tot}}}
=\frac{1}{\sqrt{(1\times10^{-6})(215\times10^{-12})}}$$
giving $\boxed{\omega_o = 6.82\times10^{7}\ \text{rad/s}\ \ (f_o = 10.85\ \text{MHz})}$.
Using $C_1$ alone would return $7.07\times10^{7}$ rad/s, about 3.7 per cent high.
Part (b) — the gain at resonance. At $\omega_o$ the parallel
tank is an open circuit, so no signal current is drawn from the source and the whole of
$v_S$ appears at the gate: $v_{IN}=v_S$ exactly, with no divider loss across $R_S$. The
common-source stage then delivers
$$\frac{v_{OUT}}{v_S}=\frac{v_{OUT}}{v_{IN}}=-g_mR_L
=-(2\times10^{-3})(2\times10^{3})$$
so $\boxed{v_{OUT}/v_S = -4.0\ \ (12.0\ \text{dB, inverting})}$. Note the question asks for
the gain from $v_S$ rather than from $v_{IN}$: at resonance the two coincide, which is the
single most useful property of putting the tank at the input.
Part (c) — identify the damping resistance. The only resistance
in parallel with the tank is the source resistance $R_S$; $R_L$ is on the far side of the
transistor and cannot damp the gate node. For a parallel RLC the −3 dB bandwidth is
set entirely by that resistance and the total capacitance:
$$\text{BW}=\frac{1}{R_SC_{tot}}=\frac{1}{(1\times10^{3})(215\times10^{-12})}$$
which gives $\boxed{\text{BW} = 4.65\times10^{6}\ \text{rad/s}\ \ (740\ \text{kHz})}$.
Cross-check through the quality factor. The two independent routes to
$Q$ must agree:
$$\begin{aligned}Q&=\frac{\omega_o}{\text{BW}}
=\frac{6.82\times10^{7}}{4.65\times10^{6}}=14.66\\
Q&=R_S\sqrt{\frac{C_{tot}}{L_1}}
=1000\sqrt{\frac{215\times10^{-12}}{1\times10^{-6}}}=14.66\end{aligned}$$
A $Q$ near 15 is a genuinely selective front end — the response is down 3 dB within
±3.4 per cent of the centre frequency.
Confirm against an exact solve of the two-node circuit. Writing nodal
equations at the gate and the drain with $C_{gd}$ retained as a real bridging element (no
Miller approximation) and sweeping frequency gives a peak of 3.79 at
$6.82\times10^{7}$ rad/s, against the 4.0 predicted above, and half-power points at
$6.58\times10^{7}$ and $7.07\times10^{7}$ rad/s for an exact bandwidth of
$4.87\times10^{6}$ rad/s. The Miller-based answers are therefore 5.2 per cent optimistic in
gain and 4.6 per cent narrow in bandwidth — small enough that the closed forms are
the right exam answers, and worth quoting beside them.
Question 4 — magnitude of vOUT/vS computed exactly from the two-node model, showing the resonant peak and the two half-power frequencies that define the 3 dB bandwidth.
Check — where $C_2$ actually sits. Read
literally that is not solvable: an infinite capacitor at the drain would short the output and
the gain would be zero at every frequency, so parts (b) and (c) could not be answered at all. $C_2$ is drawn in parallel with the $I_{bias}$ current
source, i.e. it is the source bypass, and $C_2=\infty$ is the paper’s way of saying the
bypass is perfect. That reading makes every printed sub-part earnable and every given datum do
work, which is the test that decides these cases.
