Question 5 of 5: Bipolar Cascode Amplifier — Voltage Gain
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
Paper format. National Exams May 2018, 16-Elec-B5 Advanced
Electronics — 3 hours, CLOSED BOOK, one approved Casio or Sharp calculator. Five
questions, all to be answered, 20 marks each (100 marks total). In schematics ground
and chassis are common; op-amps are ideal and supply rails are ±15 V unless stated
otherwise. Candidates are told to state any interpretive assumption inside the answer, and to
supply block diagrams and schematics wherever an essay-format response needs them.
Reference texts. A. S. Sedra and K. C. Smith,
Microelectronic Circuits, 8th ed. (Ch. 7 transistor amplifiers, Ch. 8 differential and
multistage amplifiers, Ch. 10 frequency response, Ch. 11 feedback); B. Razavi,
Fundamentals of Microelectronics, 2nd ed. (Ch. 9 cascode stages — Question 5 is
its Example 9.9) and Design of Analog CMOS Integrated Circuits, 2nd ed. (Ch. 4
differential amplifiers, Ch. 6 frequency response); R. C. Jaeger and T. N. Blalock,
Microelectronic Circuit Design, 5th ed. (Ch. 17 low-frequency response); P. R. Gray,
P. J. Hurst, S. H. Lewis and R. G. Meyer, Analysis and Design of Analog Integrated
Circuits, 5th ed. (Ch. 8 feedback).
How each answer is laid out. Every question states its data,
the quantity sought, the circuit as drawn on the paper, a one-line strategy, then numbered
steps carrying the governing relation, the substitution and the intermediate result. Boxed
values are the answers a marker looks for, and each question closes with a results table and a
concept note.
Question 5: Bipolar Cascode Amplifier — Voltage Gain
(20 marks)
Given. A two-transistor bipolar cascode: $v_{IN}$ drives the
base of $Q_1$, whose emitter is grounded; the collector of $Q_1$ feeds the emitter of $Q_2$,
whose base is held at the d.c. bias $V_{b1}$; the collector of $Q_2$ is the output node and is
fed from $+V_{CC}$ by the ideal current source $I_1 = 1$ mA. Device data: $\beta = 100$,
$V_A = 5$ V. The thermal voltage is taken as $V_T = 26$ mV, the convention of the text this
question is drawn from.
Find. The small-signal voltage gain $v_{OUT}/v_{IN}$ of the
cascode, driving the infinite resistance of the ideal current source.
Question 5 — bipolar cascode. Q1 is a common-emitter driver, Q2 a common-base cascode, and the ideal current source I1 presents an infinite load, so the whole gain is set by the cascode output resistance.
Approach. The gain of any common-emitter-derived stage is
$-g_{m1}R_{out}$; since the current-source load is ideal, $R_{out}$ is entirely the resistance
looking into the collector of the cascode device, which is $r_{o2}$ boosted by the degeneration
$Q_1$ provides.
Establish the small-signal parameters. Both transistors carry the same
1 mA, so they share one set of parameters:
$$\begin{aligned}g_m&=\frac{I_C}{V_T}=\frac{1\times10^{-3}}{26\times10^{-3}}
=38.46\ \text{mA/V}\\
r_\pi&=\frac{\beta}{g_m}=\frac{100}{38.46\times10^{-3}}=2.6\ \text{k}\Omega\\
r_o&=\frac{V_A}{I_C}=\frac{5}{1\times10^{-3}}=5\ \text{k}\Omega\end{aligned}$$
The Early voltage of 5 V is unusually low, which is what makes the cascode worth building
here: a lone common-emitter stage would manage only $-g_mr_o=-192$.
Identify what degenerates the cascode device. Looking down from the
emitter of $Q_2$ one sees two things in parallel: $Q_1$’s own output resistance
$r_{o1}$, and $Q_2$’s base–emitter resistance $r_{\pi2}$, because $Q_2$’s
base is a.c. grounded. Hence
$$R_E=r_{\pi2}\parallel r_{o1}=\frac{(2.6)(5)}{2.6+5}=1.711\ \text{k}\Omega$$
This parallel pair is the whole reason a bipolar cascode behaves differently from
a MOS one, where no $r_\pi$ exists to spoil the degeneration.
Compute the output resistance of the cascode. A transistor degenerated
by $R_E$ presents at its collector
$$R_{out}=r_{o2}\big[1+g_{m2}(r_{\pi2}\parallel r_{o1})\big]+(r_{\pi2}\parallel r_{o1})$$
$$=5000\big[1+(38.46\times10^{-3})(1711)\big]+1711=5000(66.79)+1711$$
which evaluates to $\boxed{R_{out} = 335.7\ \text{k}\Omega}$ — a 67-fold improvement
on the 5 kΩ a single device offers.
Check $R_{out}$ against the hard ceiling. Because
$r_{\pi2}\parallel r_{o1}\le r_{\pi2}$ and $g_{m2}r_{\pi2}=\beta$ exactly, no bipolar
cascode can ever exceed
$$R_{out}\le\beta\,r_o=(100)(5\ \text{k}\Omega)=500\ \text{k}\Omega$$
The computed 335.7 kΩ sits below it, as it must. This one-line test is the fastest
way to catch the standard error of dropping $r_{\pi2}$ and writing
$R_{out}=r_{o2}(1+g_{m2}r_{o1})=965$ kΩ, which is impossibly above the ceiling and
should be rejected on sight.
Form the voltage gain. The ideal current source contributes infinite
resistance, so the total load at the output node is $R_{out}$ alone, and
$$\frac{v_{OUT}}{v_{IN}}=-g_{m1}R_{out}=-(38.46\times10^{-3})(335.7\times10^{3})$$
giving $\boxed{v_{OUT}/v_{IN} = -1.29\times10^{4}\ \ (82.2\ \text{dB, inverting})}$. The
corresponding ceiling on the gain is $g_m\beta r_o=1.92\times10^{4}$, so the design
realises about two thirds of the maximum a bipolar cascode can reach at this bias.
Record the alternative thermal-voltage convention. This question is
Example 9.9 of Razavi’s Fundamentals of Microelectronics, which uses
$V_T=26$ mV throughout; the boxed values follow that text. Taking $V_T=25$ mV instead would give $g_m=40$ mA/V,
$R_{out}=340$ kΩ and $A_v=-1.36\times10^{4}$ — a 5.3 per cent spread on
identical method. Both are defensible under the paper’s instruction to state
assumptions; the cited text governs the boxed number.
Check — the current source is taken as ideal.
The drawing shows $I_1$ as a bare current-source symbol with no output resistance marked, and
instruction 7 of the paper permits ideal sources unless stated otherwise, so the load
resistance is infinite and $R_{out}$ alone sets the gain. A real cascoded current-source load
of the same 1 mA would present roughly the same 336 kΩ, halving the total load and hence
the gain to about $-6.5\times10^{3}$. If the intended reading were a real load the method is
unchanged — only the final parallel combination differs.