Question 5 of 6: Serial character echo with case swap; TxD waveforms

Question 5: Serial character echo with case swap; TxD waveforms (12 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. 9600-baud, already-initialized async serial port; a blocking receive routine inchar ($FFCD_{16}$) returning the char in ACCA; interrupt-driven transmit; received character ‘U’ $=55_{16}$, its lowercase ‘u’ $=75_{16}$.

Find. (a) the program algorithm; (b) the two TxD waveforms with full labels and scales.

Approach (part a). Case is a single ASCII bit: letters differ between upper- and lowercase only in bit 5 ($20_{16}$), so an $\text{EOR }\#20_{16}$ toggles case in one instruction. Receive by polling via inchar, toggle case, then hand the byte to an interrupt-driven transmit routine.

1. Receive. $\text{JSR}$ inchar — blocks until RDRF (receive-data-ready) is set, returning the character in ACCA ($=55_{16}$ for ‘U’).
2. Convert case. $\text{EORA }\#20_{16}$ flips bit 5: $55_{16}\;(0101\,0101)\;\oplus\;20_{16}=75_{16}\;(0111\,0101)=$ ‘u’. (For a lowercase input the same XOR maps it back to uppercase.) Store the byte in a one-character buffer.
3. Arm the transmit interrupt. Set the transmit-interrupt-enable bit in CR (enable TDRE / TIE). With the global interrupt mask cleared, the CPU may continue other work.
4. Transmit ISR. When TDR is empty the port raises its TDRE flag → interrupt. The service routine reads the buffered ‘u’, writes it to TDR (which serializes start + 8 data + stop at 9600 baud), then clears TIE so no further transmit interrupt occurs for this single character, and returns ($\text{RTI}$).

Part (b) — the transmitted frame. Because the program echoes the converted character, the byte on TxD is ‘u’ $=75_{16}=0111\,0101$. In an 8-N-1 async frame the line idles high, drops for one START bit, then sends the eight data bits least-significant first ($d_0\!\dots\!d_7 = 1,0,1,0,1,1,1,0$), then one STOP (high) bit. Each bit lasts $1/9600 = 104.2\ \mu\text{s}$.

The two waveforms carry identical timing and identical bit meanings; only the electrical convention differs. On the board a logic 1 is $+5$ V and the idle line sits high; the RS-232 driver inverts the logic and uses bipolar levels, so a mark(1) becomes $-12$ V and a space(0) becomes $+12$ V — the idle line therefore sits at $-12$ V and the START bit swings positive.