Question 6 of 6: Parallel I/O — CPU methods and device handshaking

Question 6: Parallel I/O — CPU methods and device handshaking (12 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. A three-block parallel-I/O model: CPU ↔ interface (control, IRQ, bidirectional data bus) and interface ↔ device (H1 interface→device, H2 device→interface, bidirectional data lines).

Find. (a) the two CPU-side transfer methods and which is more efficient; (b) two handshake protocols and the input/output step sequences with the role of H1/H2.

(a) Two CPU methods. The CPU can learn of interface readiness by programmed / polled I/O or by interrupt-driven I/O. In polling the program repeatedly reads a status bit (in SR) and busy-waits until the interface signals ready, then moves the data. In interrupt-driven I/O the interface asserts IRQ when ready; the CPU runs other code meanwhile and only services the transfer inside an interrupt routine. Interrupt-driven I/O is more efficient: polling wastes essentially all CPU cycles spinning on a status bit (especially against slow peripherals), whereas interrupts let the processor do useful work and respond only when a transfer is actually needed.

(b)(i) Two handshake protocols. Parallel data exchange between the interface and the device uses (1) a one-way strobe protocol, in which the source pulses a single control line to mark valid data (no confirmation returned), and (2) a two-way, fully interlocked handshake, in which the source asserts “data valid” and the destination replies with “data accepted” before the cycle completes. The interlocked handshake is the robust choice because it adapts to the actual speed of both ends.

(b)(ii) INPUT (device → interface). The device is the data source. It places a data word on the data lines and asserts H2 = VALID DATA (data ready). The interface latches the word and replies with H1 = ACKNOWLEDGEMENT (data accepted). The device then removes its data and negates H2, and the interface negates H1, readying the next transfer. Because H1 runs interface→device and H2 device→interface, on input H2 carries valid-data and H1 the acknowledge.

OUTPUT (interface → device). Now the interface is the source. It drives the data lines and asserts H1 = VALID DATA (data ready to the device). The device reads the word and replies with H2 = ACKNOWLEDGEMENT (data accepted). The interface then removes the data and negates H1, and the device negates H2. So on output the roles swap: H1 signals valid-data and H2 the acknowledge — consistent with each line’s fixed direction, the producer always drives valid-data and the consumer always returns the acknowledge.