Question 3 of 6: Cascode differential pair — gain, input range and CMRR

Question 3: Cascode differential pair — gain, input range and CMRR (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. An n-channel differential pair $M_{1}$–$M_{2}$ is biased by a 1 mA tail source and cascoded by $M_{3}$–$M_{4}$, whose gates are held at $V_{bias}$; equal resistors $R_{1}=R_{2}$ return the cascode drains to $+V_{DD}$ and the output is taken single-ended at the drain of $M_{4}$. The inputs are driven anti-phase, $+v_{IN}/2$ and $-v_{IN}/2$.

Find. The single-ended differential gain, the common-mode input resistance, the range of common-mode input voltage over which every device stays saturated, and the common-mode rejection ratio expressed in decibels.

Approach. Split the tail current between the two halves to get $g_{m}$ and $r_{o}$, use the differential half-circuit for the gain, apply the saturation condition at each node for the input range, and finally give the tail source a finite output resistance so that the common-mode gain — and hence the CMRR — is finite.

1. Bias each half of the pair. With the inputs balanced the tail current splits equally, $I_{D}=I_{bias}/2=0.5\ \text{mA}$. Inverting the saturation law supplied with the question, $I_{D}=\tfrac{1}{2}K\left(V_{GS}-V_{TH}\right)^{2}$, gives the overdrive $$V_{ov}=\sqrt{\frac{2I_{D}}{K}}=\sqrt{\frac{2(0.5\ \text{mA})}{0.5\ \text{mA/V}^{2}}} =1.414\ \text{V},\qquad V_{GS}=V_{TH}+V_{ov}=2.414\ \text{V},$$ and the two small-signal parameters follow at once: $$\boxed{g_{m}=KV_{ov}=\frac{2I_{D}}{V_{ov}}=0.707\ \text{mA/V},\qquad r_{o}=\frac{1}{\lambda I_{D}}=\frac{1}{(0.02)(0.5\ \text{mA})}=100\ \text{k}\Omega}$$ Because all four transistors carry the same 0.5 mA and share the same $K$, these values apply to the cascode devices as well.
2. Part (a) — find what the cascode actually loads the resistor with. Looking up into the drain of $M_{4}$ the cascode multiplies the resistance of $M_{2}$: $$R_{casc}=r_{o4}+r_{o2}+g_{m4}r_{o4}r_{o2} =100\ \text{k}\Omega+100\ \text{k}\Omega+(0.707\ \text{mA/V})(100\ \text{k}\Omega)^{2} =7.27\ \text{M}\Omega .$$ That is more than three thousand times $R_{2}$, so the effective load is $R_{2}\parallel R_{casc}=1999\ \Omega\approx R_{2}$ — a useful reminder that cascoding buys nothing when a resistor sets the gain.
3. Compute the differential gain from the half-circuit. Half of the differential input, $-v_{IN}/2$, appears at the gate of $M_{2}$, and the resulting drain current $g_{m}\left(-v_{IN}/2\right)$ is delivered through the cascode into the load, so $$\frac{v_{OUT}}{v_{IN}}=\frac{g_{m}\left(R_{2}\parallel R_{casc}\right)}{2} =\frac{(0.707\ \text{mA/V})(1999\ \Omega)}{2}$$ $$\boxed{A_{d}=\frac{v_{OUT}}{v_{IN}}=0.707\ \text{V/V}}$$ The factor of two is not optional: the output is taken single-ended, so only one half of the pair drives it. The gain is below unity because $g_{m}R_{2}=1.41$ — a 2 k$\Omega$ resistor is simply too small a load for a 0.707 mA/V device.
4. Part (b) — state the common-mode input resistance. Both inputs drive MOS gates, which are separated from the channel by the gate oxide and draw no current at any frequency down to d.c. Therefore $$\boxed{R_{icm}\rightarrow\infty}$$ In practice it is set by gate leakage and by the reverse-biased junctions of any input protection, giving values in the $10^{12}\ \Omega$ range at room temperature; at higher frequencies the input impedance is capacitive, not resistive. This is the single clearest advantage of a MOS input stage over the bipolar pair of Question 1, whose input resistance would be $r_{\pi}$.
5. Part (c) — find the upper limit of the common-mode range. The binding constraint at the top is that $M_{1}$ and $M_{2}$ must stay saturated. Their drains sit at the sources of the cascode devices, $$V_{D1}=V_{bias}-V_{GS3}=6-2.414=3.586\ \text{V},$$ and saturation requires $V_{D1}\ge V_{G1}-V_{TH}$, i.e. $$V_{ICM}\le V_{D1}+V_{TH}=3.586+1=4.586\ \text{V}.$$ Equivalently $V_{DS1}=6-V_{ICM}\ge V_{ov}=1.414\ \text{V}$, which gives the same number. The cascode devices themselves are in no danger: their drains sit at $V_{DD}-I_{D}R=10-1=9\ \text{V}$, leaving $V_{DS3}=5.41\ \text{V}$ against an overdrive of 1.414 V.
6. Find the lower limit and state the range. Going down, the source node of the pair follows the input, $V_{S}=V_{ICM}-V_{GS}=V_{ICM}-2.414\ \text{V}$, and the tail source needs that node to stay above its own compliance voltage. Taking the tail as the ideal current source drawn on the paper, the limit is $V_{S}\ge0$, so $$\boxed{2.41\ \text{V}\ \le\ V_{ICM}\ \le\ 4.59\ \text{V}}$$ a usable window of about 2.2 V centred on 3.5 V. If instead the tail is realised as a MOSFET of the same $K$ carrying the full 1 mA, its own overdrive is $\sqrt{2I_{bias}/K}=2.0\ \text{V}$ and the lower limit rises to 4.41 V, leaving barely 0.17 V of range — which is exactly why telescopic cascodes have a reputation for poor input range.
7. Part (d) — give the tail a finite resistance and evaluate the CMRR. A common-mode input drives both halves together, and the tail node then behaves as a degeneration resistance shared by the pair. Modelling the tail as a saturated MOSFET carrying $I_{bias}$ with the same $\lambda$, $$R_{SS}=\frac{1}{\lambda I_{bias}}=\frac{1}{(0.02)(1\ \text{mA})}=50\ \text{k}\Omega ,$$ and the single-ended common-mode gain of a degenerated pair is $$A_{cm}=-\frac{R_{2}\parallel R_{casc}}{\dfrac{1}{g_{m}}+2R_{SS}} =-\frac{1999}{1414+100\,000}=-0.0197\ \text{V/V}.$$ Dividing the differential gain by this, $$\boxed{\text{CMRR}=\left|\frac{A_{d}}{A_{cm}}\right|=\frac{0.707}{0.0197}=35.9 \;\Longrightarrow\;20\log_{10}(35.9)=31.1\ \text{dB}}$$ The compact form $\text{CMRR}=g_{m}R_{SS}+\tfrac{1}{2}$ reproduces the same 35.9, and the familiar shortcut $g_{m}R_{SS}=35.4$ gives 31.0 dB — close enough that either is acceptable as an estimate.

Thirty-one decibels is modest for a differential amplifier, and the reason is visible in the arithmetic: CMRR here is essentially $g_{m}R_{SS}$, and a resistively loaded pair biased at a large overdrive has a small $g_{m}$ for its current. Replacing the tail with a cascoded current source, or the drain resistors with current-source loads, is the standard remedy.