Part B, Question 2: Common-source MOSFET amplifier — bias design and gain: 23-Mechatronics-A2 Circuits and Electronics, December 2019, Q8

Part B, Question 2: Common-source MOSFET amplifier — bias design and gain [10, 10]

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given.

Quantity	Value
$V_{TH}$	1 V
$K$	4 mA/V$^2$
$\lambda$	0
$V_{DD}$	15 V
Target $I_D$	0.5 mA
Target $V_S$	3.5 V
Target $V_D$	6 V
$R_{in}=R_{G1}\\|R_{G2}$	1.67 MΩ
$R_I$	100 kΩ
$R_L$	200 kΩ

Find. $R_{G1},R_{G2},R_S,R_D$; the overall gain $v_{out}/v_i$.

Common-source n-channel MOSFET stage: $R_{G1}/R_{G2}$ gate divider (AC-coupled input via $R_I,C_1$), $R_D$ to $V_{DD}$, $R_S$ to ground, $C_2$ couples $v_{out}$ to $R_L$.

Approach. Use the square-law saturation equation to fix $V_{GS}$, then Ohm’s law at the source and drain for $R_S,R_D$, a divider-ratio + parallel-resistance pair of equations for $R_{G1},R_{G2}$, and the standard CS small-signal model (with input attenuation) for the gain.

Overdrive and $V_{GS}$. $$I_D=\tfrac12K(V_{GS}-V_{TH})^2\ \Rightarrow\ V_{GS}-V_{TH}=\sqrt{\frac{2I_D}{K}}=\sqrt{\frac{2(0.5\text{m})}{4\text{m}}}=0.50\ \text{V},\quad V_{GS}=\boxed{1.50\ \text{V}}.$$
Gate bias voltage. $$V_G=V_S+V_{GS}=3.5+0.50=\boxed{5.00\ \text{V}}.$$
Source and drain resistors (Ohm’s law). $$R_S=\frac{V_S}{I_D}=\frac{3.5}{0.5\text{m}}=\boxed{7.0\ \text{k}\Omega},\qquad R_D=\frac{V_{DD}-V_D}{I_D}=\frac{15-6}{0.5\text{m}}=\boxed{18.0\ \text{k}\Omega}.$$
Gate divider. The divider must set $V_G/V_{DD}=5.00/15=0.3333=R_{G2}/(R_{G1}+R_{G2})$, while also giving $R_{G1}\|R_{G2}=1.67\ \text{M}\Omega$. Solving the pair simultaneously: $$R_{G1}=\boxed{5.01\ \text{M}\Omega},\qquad R_{G2}=\boxed{2.50\ \text{M}\Omega}.$$
Transconductance. $$g_m=K(V_{GS}-V_{TH})=4\text{m}\times0.50=\boxed{2.00\ \text{mA/V}}.$$
Core CS gain and input attenuation. With $\lambda=0$, $r_o=\infty$: $$A_{core}=-g_m(R_D\|R_L)=-2.00\text{m}\times16.514\text{k}=-33.03,\qquad \frac{v_{in}}{v_i}=\frac{R_{in}}{R_{in}+R_I}=0.9435.$$
Overall gain. $$\frac{v_{out}}{v_i}=A_{core}\times\frac{R_{in}}{R_{in}+R_I}=-33.03\times0.9435=\boxed{-31.16\ \text{V/V}}.$$

Quantity	Result
$V_{GS}$	1.50 V
$R_S$	$\boxed{7.0\ \text{k}\Omega}$
$R_D$	$\boxed{18.0\ \text{k}\Omega}$
$R_{G1}$	$\boxed{5.01\ \text{M}\Omega}$
$R_{G2}$	$\boxed{2.50\ \text{M}\Omega}$
$v_{out}/v_i$	$\boxed{-31.16\ \text{V/V}}$

Concept & Theory

Topic. Square-law MOSFET bias design and common-source small-signal gain with source loading.

Key relations. Saturation $I_D=\tfrac12K(V_{GS}-V_{TH})^2$; $g_m=K(V_{GS}-V_{TH})$; $A_v=-g_m(R_D\|R_L)$; input attenuation $R_{in}/(R_{in}+R_I)$.

Why this works. The square-law equation fixes the overdrive voltage from the required bias current, and Ohm’s law at the already-fixed $V_S,V_D$ nodes gives $R_S,R_D$ directly; the gate divider then only has to reproduce the required $V_G$ at the required input resistance, an independent pair of constraints solved simultaneously. The overall gain is the intrinsic CS gain reduced by whatever fraction of $v_i$ actually reaches the gate through the source/input-resistance divider.

Common pitfall. Forgetting the source-side attenuation $R_{in}/(R_{in}+R_I)$ and reporting only the core gain; using $I_D=K(V_{GS}-V_{TH})^2$ without the factor of $\tfrac12$, which halves the overdrive calculation.

Source. Sedra & Smith, Microelectronic Circuits §5.4–5.7, §7.3 (MOSFET biasing, common-source small-signal gain).

Question 8 of 11: Part B, Question 2: Common-source MOSFET amplifier — bias design and gain

Part A — Circuits

Part B, Question 2: Common-source MOSFET amplifier — bias design and gain [10, 10]