Multiplexed 2-digit 7-segment LED display driver: 23-Mechatronics-A3 Digital Logic and Embedded Systems, December 2018, Q6

Question 6: Multiplexed 2-digit 7-segment LED display driver [4+4+4 = 12]

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. $V_{source}=5\,\text{V}$; transistor saturation $V_{CE(sat)}\approx0.3\,\text{V}$ (applies to both the digit-select transistor T1/T0 and the open-collector inverter's output transistor — both are ordinary saturated BJTs in the current path); target LED current $I=10\,\text{mA}$; nominal LED forward voltage $V_f=2\,\text{V}$; PB7 selects T1 (10's digit) when HIGH and T0 (1's digit) when LOW; PB6…PB0 map, in the order given on the schematic, to segments $g,f,e,d,c,b,a$; each of PB6–PB0 passes through an inverter before driving its segment's cathode, so a common-anode segment lights when its Port B bit is HIGH (bit=1 → inverter output LOW → cathode sinks → segment ON).

Find. (a) the two Port B bytes needed to display "40"; (b) the software refresh sequence; (c) $R_T$.

Approach. (a)–(b): because only one common-anode digit can be lit at a time (PB7 selects it), "40" is displayed by rapidly time-multiplexing between a "4" word and a "0" word, faster than the eye can follow (persistence of vision). (c): write Kirchhoff's voltage law around one segment's current loop — source, select transistor (saturated), LED, $R_T$, inverter output transistor (saturated), ground — and solve for $R_T$ at the target current.

Fig. 6 — current path through one lit segment: 5 V source → saturated select transistor → LED segment → $R_T$ → saturated open-collector inverter → ground.

(a) Segment patterns. Standard 7-segment codes (segments $a$ top, $b$ upper-right, $c$ lower-right, $d$ bottom, $e$ lower-left, $f$ upper-left, $g$ middle; 1 = ON): digit "0" lights $a,b,c,d,e,f$ (not $g$); digit "4" lights $b,c,f,g$ (not $a,d,e$). Packing PB6…PB0 $=g,f,e,d,c,b,a$: "0" → $0111111_2=$ 0x3F; "4" → $1100110_2=$ 0x66. Adding the PB7 digit-select bit (1 for the 10's digit, 0 for the 1's digit) gives the two Port B words (PB7…PB0) needed: for "4" on the 10's digit, $$\boxed{11100110_2}\ (\text{0xE6}),$$ and for "0" on the 1's digit, $$\boxed{00111111_2}\ (\text{0x3F}).$$
(b) Refresh sequence. Because the two common anodes are never both driven active at once, the microcontroller must alternate the two Port B words fast enough that persistence of vision fuses them into one steady "40":
1. Write 0xE6 to Port B (selects the 10's digit, segments for "4"); hold for a short dwell (a few ms), e.g. via a timer interrupt or a calibrated software delay.
2. Write 0x3F to Port B (selects the 1's digit, segments for "0"); hold for the same dwell.
3. Repeat steps 1–2 continuously (e.g. in the main loop or a periodic ISR) at a total refresh rate above roughly 50–60 Hz (so each digit is individually re-lit at least ~25–30 Hz), which is fast enough that the human eye perceives both digits as being lit simultaneously and steadily, with no visible flicker.
(c) $R_T$ from KVL around the lit-segment loop. The current for a lit segment flows: source (5 V) $\to$ select transistor T1/T0 (saturated, drop $V_{CE(sat)}$) $\to$ LED segment (drop $V_f$) $\to R_T$ (drop $IR_T$) $\to$ open-collector inverter output transistor (saturated, drop $V_{CE(sat)}$) $\to$ ground. Summing drops around the loop: $$V_{source}=V_{CE(sat)}+V_f+IR_T+V_{CE(sat)}$$ $$5=0.3+2+(0.010)R_T+0.3$$ $$R_T=\frac{5-0.3-2-0.3}{0.010}=\frac{2.4}{0.010}=\boxed{240\ \Omega}.$$

Quantity	Result
Port B word, '4' on 10's digit	$\boxed{11100110_2}$ (0xE6)
Port B word, '0' on 1's digit	$\boxed{00111111_2}$ (0x3F)
Refresh strategy	Alternate the two words, >~50–60 Hz total
$R_T$	$\boxed{240\ \Omega}$

Check. The exact wiring of PB6–PB0 to segments $g,f,e,d,c,b,a$ (in that order) and the active-HIGH sense of PB7's digit select follow the order the segments and port lines are listed together on the original schematic; the schematic's own inverter/transistor labelling is partly unclear. Both assumptions are stated explicitly here so the derivation can be re-checked against the original figure.

Concept & Theory

Topic. Multiplexed common-anode 7-segment display driving and LED current-limiting resistor design.

Key relations. 7-segment code tables (per-digit segment ON/OFF pattern); KVL current-loop equation $V_{source}=\sum V_{drops}+IR$; persistence-of-vision refresh-rate rule of thumb ($\gtrsim$50–60 Hz).

Why this works. Driving $N$ digits from one 8-bit port with only 7 segment lines plus 1 select line is only possible because the eye cannot resolve flicker above roughly 50 Hz — the hardware genuinely lights one digit at a time, and "simultaneous" display is an illusion created entirely in software timing, not in the circuit. The resistor calculation must include every series voltage drop in the actual current loop, not just the LED — here that means both saturated transistors (select transistor and open-collector inverter output stage), each contributing a real, non-negligible 0.3 V at 10 mA.

Common pitfall. Sizing $R_T$ from $V_{source}=V_f+IR_T$ alone (ignoring the transistor saturation drops) gives 300 Ω instead of 240 Ω — a resistor too large by one quarter, under-driving the LED below the intended 10 mA. Also, forgetting the digit-select line altogether and writing only the 7 segment bits leaves both digits permanently un-selected.

Source. Hamacher, Vranesic, Zaky & Manjikian, Computer Organization and Embedded Systems §1.4 (I/O interfacing); Motorola/Freescale, M68HC11 Reference Manual § port I/O and timer-driven multiplexed display examples.

Question 6 of 6: Multiplexed 2-digit 7-segment LED display driver

Question 6: Multiplexed 2-digit 7-segment LED display driver [4+4+4 = 12]